It just occurred to me I didn't account for converter efficiency when calculating minimum turns ratio. Minimum turns ratio will be less than 9.
Here's how a pwm controller works (neglecting efficiencies):
pwm = N * V_reg / V_cap
If V_cap = 130V, V_reg = 14.4V, N = 9 then pwm = 99.7%
If V_cap drops lower we lose regulation as pwm can't be greater than 100%. In this example, 130V is the absolute minimum capacitor voltage in order to maintain regulation.
I'm pretty sure that's the problem with PD. The turns ratio (N) is too big. It loses regulation because V_cap is too small.
Sal
DryCamper11 wrote:
ken white wrote:
IF PWM controlled, you can adjust the feedback circuit to change (increase) the duty cycle which will in effect, increase the supplied current. However, I am just guessing without looking at the schematic and feedback loops.
The duty cycle is controlled by the UC3xxx chip (forgot the number it is posted in this thread), which is designed specifically for this job. It has a voltage limit input and a current limit input. They should produce constant current up to the voltage limit. However, there are some other inputs to that chip (short circuit protection, etc.), and the PD design may have some crosstalk between the voltage produced by the current sensing input and the voltage input to the duty cycle control. That was what drove my mods 2 and 3. I fooled the chip into thinking it was running at lower current, and then reduced the current limit in the hopes of reducing potential voltage based current/voltage crosstalk resulting from the circuit in which that chip was embedded.