Salvo wrote:
I just came home from my 11 week camping trip. Dang, it was just about as hot in Zion as in Vegas. In Zion, everybody had the same idea: hike the Narrows. It's a far cry from spring time when heavy wet suits are required. Anyways, I got a lot of experience with dc/dc converters. I few months ago I also noticed the unity gain error amp and though it was quite strange. But then as you noticed, I saw the opto-isolator has an amp that may contain the gain stage.
I'm almost certain that PD uses the resistors in the current monitoring circuit to adjust the "gain" They have about 6 resistors in parallel, each with a different value,and they remove some to increase the resistance as they want to change the slope of the current versus error voltage curve.
The 3846 current mode control chip keeps the output connected ("ON" part of the duty cycle) until the voltage across those resistors (which are in series with the output current) matches the error voltage it sees. The two voltages are applied to a comparator which directly controls the on/off duty cycle. By reducing that current monitor resistance, the voltage for any given current will be reduced and the corresponding duty cycle will be increased.
If you have a scope, I would look at the duty cycle. As the voltage drops (with high current demand), the duty cycle should increase. What's keeping the pwm pulses from increasing?
The scope was used and the duty cycle does increase with increasing error voltage. The problem is that PD has it set so that it takes about 2 volts (very roughly) between the output voltage and the target voltage before the duty cycle is high enough to give 80 amps.
As we reach 13.4 volts, the error voltage has dropped to a value corresponding to 40A. (These are just approximate numbers - I could look at the charts to get more accurate numbers, but you get the idea).
We have to discharge the battery bank to roughly 50% to get a high enough error voltage when charging to be current limited.
I suspect the solution is to decrease the current monitor resistance so 1 volt (or less) produces an 80A duty cycle, then adjust the current limit to prevent more than an 80A duty cycle. It should then remain in current limited mode until much closer to the target limit. By adjusting the current monitor resistor, we should be able to get as close to the target voltage as we want before tapering sets in.
Of course, until I finish testing this, it's still conjecture. Educated conjecture, but conjecture nonetheless. I should have a good idea by tomorrow provided I didn't screw up the calculations too much. I'm discharging now and will charge tonight.
Any comments would be appreciated.